• A spiral waveguide
  • A photonic chip integrated to a PCB
  • Coupling light into a spiral waveguide
  • A wide-band MMI

LIVE: MPW 12th Call for Passive Devices with Heaters

The design rules for MPW Run 12 (passive devices with heaters on 340 nm SOI) have been announced.

The sign up deadline is Friday 15th March 2019.

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CORNERSTONE @ PIC International

Dr Callum Littlejohns will be presenting a CORNERSTONE talk at the PIC International Conference on 26-27th March 2019 in Brussels, Belgium. There will also be a CORNERSTONE exhibition stand for you to meet the team. 


The 2019 CORNERSTONE MPW schedule has been announced.




CORNERSTONE Multi Project Wafer Run 3 Announced

The design rules for CORNERSTONE multi project wafer (MPW) run 3 have been announced. The platform is 500 nm Si / 3 µm buried oxide (BOX) silicon-on-insulator (SOI). There will be 2 silicon etches of 160 nm (grating couplers) and 500 nm (strip waveguides).

The mask submission deadline is Friday 28th July.