• A spiral waveguide
  • A photonic chip integrated to a PCB
  • Coupling light into a spiral waveguide
  • A wide-band MMI

LIVE: MPW 12th Call for Passive Devices with Heaters

The design rules for MPW Run 12 (passive devices with heaters on 340 nm SOI) have been announced.

The sign up deadline is Friday 15th March 2019.

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CORNERSTONE @ PIC International

Dr Callum Littlejohns will be presenting a CORNERSTONE talk at the PIC International Conference on 26-27th March 2019 in Brussels, Belgium. There will also be a CORNERSTONE exhibition stand for you to meet the team. 

Schedule

The 2019 CORNERSTONE MPW schedule has been announced.

 

 

 

CORNERSTONE Multi Project Wafer Run 4 Announced

The design rules for CORNERSTONE multi project wafer (MPW) run 4 have been announced. There will be:

  • 3 Si etch processes:

1) a shallow Si etch of 70 nm (grating couplers),

2) an intermediate Si etch of 120 nm (rib waveguides), and

3) a continuation Si etch of a further 100 nm to the BOX layer (strip waveguides).

  • 4 Si implants for active device fabrication, as well as a single metal layer for ohmic Si contacts, on top of a 1 μm thick SiO2 top cladding layer.
  • Metal heaters.

Access to this run is free of charge for UK research institutes (funded by EPSRC). Overseas universities and industrial companies can access this run for a charge of £35,000. Due to popular demand, we are also offering a reduced design space of 5.5 mm x 4.9 mm for a discounted cost of £20,000.

The mask submission deadline is Friday 1st December 2017.