CORNERSTONE Multi Project Wafer Run 6 Announced

The design rules for CORNERSTONE multi project wafer (MPW) run 6 on the 220 nm Si / 2 µm BOX SOI platform have been announced. We will offer 3 Si etch processes: 1) a shallow Si etch of 70 nm (grating couplers), 2) an intermediate Si etch of 120 nm (rib waveguides), and 3) a continuation Si etch of a further 100 nm to the BOX layer (strip waveguides). In addition, we will offer two layers for metal heaters (heater filaments and heater contact pads).

For the first time, a process design kit (PDK) has been made available using Luceda’s IPKISS software, subject to purchasing the appropriate license. To obtain a quote for the software and a license key, please contact Luceda by sending an email to This email address is being protected from spambots. You need JavaScript enabled to view it., specifying that you require a license for CORNERSTONE PDK usage. Of course, if you already have a valid license, the PDK can be accessed free of charge.

Access to this run is free of charge for UK research institutes (funded by EPSRC). Overseas universities and industrial companies can access this run with the following options:

Design area: 11.47 mm x 4.9 mm - £10,000.

Design area: 5.5 mm x 4.9 mm - £7,000.

The mask submission deadline is Friday 6th April 2018.

For more information on future calls, visit the Schedule & Cost page.

Research Developed Using CORNERSTONE Published in Nature Communications

A multifunctional silicon photonics integrated circuit that can be programmed to perform a variety of different functions has been developed by researchers from Spain and the UK. The chip was fabricated within the framework of the CORNERSTONE project.

This is “the first photonic integrated chip that enables multiple functionalities by employing a single common architecture”.

The results have been published in Nature Communications.

Reference: Daniel Pérez, Ivana Gasulla, Lee Crudgington, David J. Thomson, Ali Z. Khokhar, Ke Li, Wei Cao, Goran Z. Mashanovich & José Capmany. Multipurpose silicon photonics signal processor core. Nature Communications 8. doi:10.1038/s41467-017-00714-1.

CORNERSTONE Multi Project Wafer Run 5 Announced

The design rules for CORNERSTONE multi project wafer (MPW) run 5 have been announced. The platform is 340 nm Si / 2 µm buried oxide (BOX) silicon-on-insulator (SOI). There will be 3 silicon etches of 140 nm (grating couplers), 240 nm (rib waveguides) and 340 nm (strip waveguides). In addition, there will be a 1 µm top cladding SiO2 layer.

The service is free of charge for UK academia. The cost for non-UK academia is £5,000 for a design space of 11.47 mm x 4.9 mm, or £3,500 for a design space of 5.5 mm x 4.9 mm.

The mask submission deadline is Friday 12th January 2018.

CORNERSTONE Multi Project Wafer Run 4 Announced

The design rules for CORNERSTONE multi project wafer (MPW) run 4 have been announced. There will be:

  • 3 Si etch processes:

1) a shallow Si etch of 70 nm (grating couplers),

2) an intermediate Si etch of 120 nm (rib waveguides), and

3) a continuation Si etch of a further 100 nm to the BOX layer (strip waveguides).

  • 4 Si implants for active device fabrication, as well as a single metal layer for ohmic Si contacts, on top of a 1 μm thick SiO2 top cladding layer.
  • Metal heaters.

Access to this run is free of charge for UK research institutes (funded by EPSRC). Overseas universities and industrial companies can access this run for a charge of £35,000. Due to popular demand, we are also offering a reduced design space of 5.5 mm x 4.9 mm for a discounted cost of £20,000.

The mask submission deadline is Friday 1st December 2017.

CORNERSTONE Multi Project Wafer Run 3 Announced

The design rules for CORNERSTONE multi project wafer (MPW) run 3 have been announced. The platform is 500 nm Si / 3 µm buried oxide (BOX) silicon-on-insulator (SOI). There will be 2 silicon etches of 160 nm (grating couplers) and 500 nm (strip waveguides).

The mask submission deadline is Friday 28th July.

CORNERSTONE Second Call Training Course Released

The training course for the CORNERSTONE second call has been published. This course is intended for users who are new to mask design, or for those who want to find out more details about the design rules, fabrication process or submission process.

The training course slides can be downloaded from here.

The mask submission deadline for the second call is Friday 30th June.